Thanks to the strong demand for chips from telecommuting, 5g, Internet of things and automotive electric electronization, the semiconductor industry has developed rapidly in 2021, which has also driven the growth of the semiconductor equipment market. Although the testing equipment is not as eye-catching as the lithography machine, it is indispensable for every process. There are not only the quantity testing equipment for the previous process and advanced process, but also the testing machine, sorting machine and probe table used for the sealing and testing link after wafer processing. The rapidly growing market and the increasingly complex demand also provide a rare opportunity for the development of local test equipment.
The investment has increased significantly, and the market scale will exceed 8 billion US dollars
Semiconductor quantity detection equipment is mainly used to detect the performance and defects of chips in the semiconductor manufacturing process, from design verification, process control detection, wafer test and finished product test, which runs through the whole semiconductor manufacturing process to ensure the controllability of product quality. Li Zhongyu, general manager of Shanghai Precision Measurement semiconductor optics division, said that in the IC manufacturing industry, testing covers the manufacturing of substrate from silicon ingot to crystal drawing, and then the thickness, flatness, roughness and electronic rate measurement of silicon wafer cutting and grinding. In the lithography process, the thickness, width and crystallinity of the layer, as well as the accuracy of the graphic position, graphic defects, cleanliness and so on should be detected. In the injection process, the concentration, oxide layer and CVD shall be tested. He pointed out that the previous chip manufacturing has thousands of processes, and the yield loss of each process is 0.1 percentage point, and the final yield is only 36.8%. Therefore, the yield control of each process link is very key, which is also the reason for the increasing proportion of detection in advanced node IC manufacturing.
In 2021, affected by covid-19 pneumonia, the global digital wave accelerated, and the demand for chip products increased rapidly, which also led to the growth of semiconductor equipment market. Take TSMC as an example. In the past two years, it has continuously invested and expanded its production worldwide. In May 2020, TSMC announced to invest US $12 billion to build a 12 inch wafer plant in the United States. In 2021, TSMC announced the expansion plan and investment plan of 28nm in Chinese mainland Nanjing and Kyushu Xiongben Prefecture, and the construction plan of new German factory is also advancing. In addition, TSMC is also actively promoting the construction of wafer factories of 3nm and below to prepare for the mass production plan of advanced technology. Wei Zhejia, President of TSMC, said that TSMC will invest US $100 billion in the next three years to expand wafer manufacturing capacity and leading technology research and development.
The production capacity of semiconductor back channel packaging and testing is also expanding rapidly, including Intel’s plan to invest US $7 billion to expand the production capacity of its advanced semiconductor packaging plant in Penang, Malaysia; Amkor plans to invest US $1.6 billion in Vietnam to build a sealing and testing plant; Sun and moonlight will invest about $2 billion 890 million in the new Taiwan sealing plant in China’s silicon industry. China’s three major sealing and testing leaders Jcet Group Co.Ltd(600584) , Tongfu Microelectronics Co.Ltd(002156) , Tianshui Huatian Technology Co.Ltd(002185) , also raised billions of yuan to invest in sealing and testing projects respectively.
As an important category of semiconductor equipment, the demand for test equipment is also rising. Semi data show that from 2020 to 2024, 60 12 inch wafer plants will be built or expanded in the world, and 25 8-inch wafer plants will be put into mass production in the same period. In terms of equipment expenditure, the global total sales of semiconductor equipment exceeded US $100 billion for the first time in 2021, reaching a new high of US $103 billion, an increase of 44.7%. In terms of the test equipment market, the global semiconductor test equipment market will reach US $6.01 billion in 2020 and is expected to reach US $8.03 billion by 2022, with a compound annual growth rate of 16%.
With the acceleration of iteration, chip testing has entered the era of complexity
With the growth of market scale, the complexity of semiconductor test equipment is also increasing. According to Huang Feihong, deputy general manager of sales of thalida China, semiconductor test equipment has roughly experienced three stages.
From 1990 to 2000, the mainstream semiconductor technology was basically at 0.8 μ M to 0.13 μ M. At this stage, CMOS technology is booming, and the function of SOC chip is becoming stronger and stronger. People continue to integrate analog functions and data interfaces on chips. The traditional test platform is more and more difficult to cover the test requirements of the newly added high-speed analog interface. Therefore, this period may be called “functional era” for the test equipment industry, which is mainly reflected in the continuous increase of the functionality of test equipment to meet the increasingly complex SOC chip requirements.
By 2000-2015, the semiconductor process has increased from 0.13 μ m. 90nm, 65nm and 28nm have developed to 14nm. The process is more and more advanced, the chip size is smaller and smaller, and the integration of transistors is higher and higher. The direct challenge brought by the increase of chip scale is the extension of test time and the increase of the proportion of test cost. If the functional era is a single station test, that is, only one chip can be tested at the same time, people’s requirements for parallel testing are constantly improving in this period. There are more and more channels integrated on the test equipment board, which can test 2 stations, 4 stations and 8 stations at the same time. This era is also the most effective era of capital, or can be called the era of capital efficiency.
After entering 2020, the semiconductor process continues to evolve along 5nm and 2 / 3nm, and the chip complexity is also increasing. With the rise of emerging markets such as 5g, big data, artificial intelligence and automatic driving, more and more functions are carried on a chip, and the product iteration speed is faster and faster. Even many high complexity chips such as AI and AP require annual iteration. This means that the complexity of chip testing increases significantly. The test equipment is further differentiated and needs to be adjusted according to different fields and requirements. Therefore, this era may be called the era of complexity.
Zhang Yifeng, the managing director of Guangdong Leadyo Ic Testing Co.Ltd(688135) also pointed out that the current chip test is not a simple function test. It is not only to answer the question of whether the chip can be used, but also to answer the question of whether it is easy to use and how long it can be used. The test solution jointly constructed by test hardware and test program is already the embodiment of the competitiveness of chip products. At the same time, customers put forward more requirements for system level testing from the aspects of test environment, test accuracy, test monitoring, test quality and test cost.
Taking RF and power management analog chips as an example, chip testing is not only to find out which are good and which are bad chips, but to trim them first and then test them, which can greatly improve the yield of products. Fine tune the frequency, voltage and current to 40% of the whole RF design time. As the process size of chips becomes smaller and smaller, trim becomes more and more important and common.
Local new opportunities, with particular attention to the needs of advanced packaging and testing
The rapid growth of the market and the complexity of user needs provide a favorable opportunity for the development of local test equipment. Zhang Yifeng said that first of all, we should grasp the demand of the local market. The test equipment market will remain highly prosperous in 2022. Because every chip needs 100% testing before it can be delivered to the use of terminal electronic products.
The rapid growth of front-end wafer equipment expenditure will inevitably lead to the expansion of production capacity. According to statistics, China’s wafer production capacity increased by 40% in 2021, and will increase by three times after the expansion projects are fully completed in the next 2-3 years, which is bound to lead to the year-on-year growth of the demand for wafer testing and back-end packaging testing. Compared with the global market, China’s test equipment market is still in the primary stage of development. It has a certain market share in simulation testing machine and manipulator, but it can be basically ignored in high-end testing machine and prober equipment. But this also means that there is huge room for development in the future. Based on the Chinese market, enterprises should give full play to the advantages of high cost performance and high-quality service, seize opportunities, and gradually expand their products to the global market.
Secondly, we should seize the new opportunities brought by technological change. Huang Feihong said that with the continuous evolution of the chip manufacturing process, new requirements have been brought to the test equipment: first, how to ensure the accuracy of the test with a higher data rate; Second, with the continuous evolution of technology, the density of integrated transistors in the chip increases geometrically. Measuring equipment covers every process from wafer manufacturing to packaging. It is required to find out potential defects quickly, accurately and non destructively, focusing on process control and capability management. The change of technology and the differentiation of demand provide an opportunity for new entrants. Local manufacturers should seize this opportunity to achieve breakthroughs in multiple product segments and provide a product basis for customers to continuously reduce costs and increase efficiency.
In addition, special attention should be paid to the testing needs of the advanced packaging market. Huang Feihong pointed out that there are two major directions for the evolution of semiconductor technology in the future: first, continue to move forward along 5 nm, 2 nm and 1 nm, but such evolution has become more and more difficult. Another way is to take the heterogeneous integration route. For example, chiplet is to integrate different modules in one chip. Not every module needs to use 2 nm and 3 nm processes. The integration and packaging of chips with different functions on chip is a development path. This also puts forward new requirements for testing and related equipment.
Zhang Yifeng stressed that China’s semiconductor industry has always attached importance to the support of front-end wafer manufacturing and chip design industries. Packaging has taken the lead in making great progress for historical reasons. Insufficient attention has been paid to the testing industry and testing equipment industry, which has highlighted the imbalance in the development of the industrial chain. At present, China’s test equipment enterprises should seize the opportunity, benchmark the world-class, and make great efforts in the stability, reliability and consistency of equipment, rather than just pursuing the lowest cost.
